#risc-v tag - Briefly

SiFive aims to cram more RISC-V cores into AI chips

SiFive's RISC-V Intelligence cores offer licensed accelerator control units for feeding tensor cores and MAC units, enabling programmable alternatives to custom ASICs across edge and AI workloads.

fromTheregister

3 weeks ago

PinePhone Pro canned in pursuit of RISC-V business

Pine64 is discontinuing its higher-end PinePhone Pro smartphone while continuing to sell the lower-end PinePhone for an estimated two more years.

Mobile UX

#linux

fromTheregister

4 weeks ago

Software development

Linux is about to lose a feature - over a personality clash

fromTheregister

1 month ago

Software development

Torvalds blasts kernel dev for late 'garbage' RISC-V patches

fromTheregister

4 months ago

Running

Linux in Excel? Sure, why not ruin both

fromTheregister

4 weeks ago

Software development

Linux is about to lose a feature - over a personality clash

fromTheregister

1 month ago

Software development

Torvalds blasts kernel dev for late 'garbage' RISC-V patches

fromTheregister

4 months ago

Running

Linux in Excel? Sure, why not ruin both

Optimizing Custom Workloads with RISC-V

RISC-V is becoming essential in developing alternatives to mainstream GPU providers amid increasing demand for cloud-based AI technology.

#nvidia

fromTechzine Global

1 month ago

Tech industry

Nvidia expands CUDA support to RISC-V

fromTheregister

1 month ago

Artificial intelligence

Nvidia CUDA gets RISC-V support

fromTechzine Global

1 month ago

Tech industry

Nvidia expands CUDA support to RISC-V

fromTheregister

1 month ago

Artificial intelligence

Nvidia CUDA gets RISC-V support

more#nvidia

fromTheregister

2 months ago

GlobalFoundries acquires chip designer MIPS

MIPS will continue to operate as a standalone business within GF and serve its customers across a broad range of technologies.

Tech industry

fromTheregister

2 months ago

Chip design is a RISC-y business: Codasip up for sale

Codasip is actively seeking buyers amidst a recent expression of interest during a funding round.

fromThe Cipher Brief

2 months ago

An Urgent Call to Close the Loopholes on Chips and China

Advanced technology made in the United States did more than just put an American on the moon, it also solidified our economic foundation.

US politics

Gadgets

fromYanko Design - Modern Industrial Design News

3 months ago

Supercomputer In A Soda Can - The NanoCluster packs 100GB RAM in an Ultra-Compact Design - Yanko Design

NanoCluster redefines supercomputing with compact design and modular capabilities, providing serious computing power within a small footprint.

#ethereum

fromHackernoon

2 years ago

Cryptocurrency

Why Is Ethereum Considering RISC-V, and What Can Cartesi Teach Us About This Shift? | HackerNoon

Moving Ethereum's execution towards RISC-V could enhance blockchain's mainstream development by leveraging established software innovations.

fromHackernoon

1 year ago

Cryptocurrency

Lumoz RaaS to Support RISC-V zkEVM: Advancing Layer2 Performance and Scalability | HackerNoon

RISC-V has the potential to replace the EVM, enhancing Ethereum's scalability and operational efficiency.

Cryptocurrency

fromHackernoon

2 years ago

Why Is Ethereum Considering RISC-V, and What Can Cartesi Teach Us About This Shift? | HackerNoon

Moving Ethereum's execution towards RISC-V could enhance blockchain's mainstream development by leveraging established software innovations.

fromHackernoon

1 year ago

Cryptocurrency

Lumoz RaaS to Support RISC-V zkEVM: Advancing Layer2 Performance and Scalability | HackerNoon

more#ethereum

#risc-v#risc-v

SiFive aims to cram more RISC-V cores into AI chips

PinePhone Pro canned in pursuit of RISC-V business

Linux is about to lose a feature - over a personality clash

Torvalds blasts kernel dev for late 'garbage' RISC-V patches

Linux in Excel? Sure, why not ruin both

Linux is about to lose a feature - over a personality clash

Torvalds blasts kernel dev for late 'garbage' RISC-V patches

Linux in Excel? Sure, why not ruin both

Optimizing Custom Workloads with RISC-V

Nvidia expands CUDA support to RISC-V

Nvidia CUDA gets RISC-V support

Nvidia expands CUDA support to RISC-V

Nvidia CUDA gets RISC-V support

GlobalFoundries acquires chip designer MIPS

Chip design is a RISC-y business: Codasip up for sale

An Urgent Call to Close the Loopholes on Chips and China

Supercomputer In A Soda Can - The NanoCluster packs 100GB RAM in an Ultra-Compact Design - Yanko Design

Why Is Ethereum Considering RISC-V, and What Can Cartesi Teach Us About This Shift? | HackerNoon

Lumoz RaaS to Support RISC-V zkEVM: Advancing Layer2 Performance and Scalability | HackerNoon

Why Is Ethereum Considering RISC-V, and What Can Cartesi Teach Us About This Shift? | HackerNoon

Lumoz RaaS to Support RISC-V zkEVM: Advancing Layer2 Performance and Scalability | HackerNoon

#risc-v
#risc-v